\newcommand{\bx}{\bar{x}}
\newcommand{\by}{\bar{y}}
\newcommand{\bz}{\bar{z}}
\newcommand{\bA}{\bar{A}}
\newcommand{\bB}{\bar{B}}
\newcommand{\bC}{\bar{C}}
\newcommand{\bD}{\bar{D}}
\newcommand{\bE}{\bar{E}}
ECE 275: D Latch and D Flip-flop
Announcemnts
- Reading assignment Read 5.8 through 5.11
- HW 6 is due next Monday at 9 AM before class.
Set-Reset latch
Q_a(t+\epsilon) = \overline{R(t)}[S(t) + Q_a(t)]
Synchronous vs Asynchronous
- Synchronous: synchronized with a clock signal
- Asynchronous: without a clock signal
Gated S-R latch
Gated S-R latch
Gated D latch
Gated D latch
Flip-Flop vs Latch
- Flip-Flop: edge triggered
- Latch: level triggered
Master Slave D Flip-Flop
Fundamentals of Logic Design by Roth (2009)
Master Slave D Flip-Flop
Fundamentals of Logic Design by Roth (2009)
Setup and hold times
Fundamentals of Logic Design by Roth (2009)
Positive vs Negative edge triggered flip-flops
- Positive: rising edge
- Negative: falling edge
T Flip-flop
J-K flip-flop
Fundamentals of Logic Design by Roth (2009)
J-K flip-flop
Fundamentals of Logic Design by Roth (2009)
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