ECE 275 — Sequential Logic Systems
Fall 2022 (In-person)
Learning objectives
By the end of this course, a student in this course will be able to:
- Design combinational circuits by hand: Limited to 2-level 5-input digital combinational circuits.
- Design sequential circuits by hand: Limited to n-input, m-state (where n+m <= 5).
- Design arbitrary digital circuits by using System Verilog.
Details
Credits: 3 credits
Web page: https://vikasdhiman.info/ECE275-Sequential-Logic
Text: David M. Harris, Sarah L. Harris - Digital Design and Computer Architecture, (Publisher: Morgan Kaufmann). You can download textbooks from libgen.rs
Additional books:
- Fundamentals of Digital Logic with Verilog Design (3rd ed.) by Brown and Vranesic.
- Charles Roth, Jr. - Fundamentals of Logic Design (6th Edition) -Cengage Learning (2009)
Prerequisite: ECE 177
Instructors
Vikas Dhiman
Barrows Hall Rm 105, [email protected]
Drop-in Hours: 2-5pm Thursdays.
Teaching assistants
- Shihab Ahamad (Monday Lab) [email protected]
- Zafaryab Haider (Tue/Wed Lab) [email protected]
- Abhilash Durgam (Tue lab/Grading) [email protected]
Expected time commitment per week
- Classes: 3 hrs
- Review and homework: 3 hrs
- Labs: 3 hrs
Grading and expectations
Expected time commitment per week: 9 hrs: Classes: 3 hrs, Review and homework: 3 hrs, Labs: 3 hrs.
Grading is an unfortunate necessity. Grades are based on the following split. Please note the emphasis on homeworks and labs.
- Homework: 30%
- Weekly; 9 homeworks; due at the beginning of the class.
- 2 mid-terms and final (Oct. 7, Nov. 9, Dec 14): 30% total (10% each).
- Closed book.
- Labs: 30%
- 6-labs; expected to be finished in lab; the deliverable is expected next week.
- Project: 10%
- Extensions to the pong-game
There will be no make-ups for missed exams; plan to be there. Late work – at most one late homework; and one late lab is allowed. Please use your allowance responsibly. Collaboration – studying in groups is encouraged for understanding, but working the problems should be worked on your own. No collaboration when you are writing down the homework. Grading will be based on absolute scale 90% (A)/80% (B)/70% (C)/60% (D).
Lab reports
The students will submit the labs in writing (preferably digital format including Verilog files, screenshots and pictures). We will create a brightspace assignment for each lab and ask students to upload relevant files and answers. Lab reports should be short proof of works in response to the lab manuals. You do not need to repeat the material from lab manuals. In the lab reports include:
- Answers to the questions in lab manuals.
- Verilog code that you wrote.
- Screenshots or pictures showing that it worked.
- It is mandatory for everyone to attend the labs in person and get their task checked off by TAs.
- All reports must be submitted individually.
- It must have proper snaps attached of any work/calculation you did in your notebook; Verilog code and FPGA kit with proper output demonstrated.
Tests
Tests will be closed book, with one A4 size paper as cheat-sheet allowed. Calculators will neither be needed nor allowed.
Labs
We will have labs throughout the semester. Please attend in person on your assigned lab day. Each student will be provided hardware. By accepting this hardware, the student is agreeing to return the hardware in good condition at the end of the semester.
Project
We will be learning Verilog throughout the course, less in the class, more in the labs. By the end of the course, you should know enough Verilog to implement a Pong game on the FPGA board. The labs are designed to help you implement a very basic version of Pong game step by step. Final project will be to add a fancier feature to the already implemented pong game.
Here are some examples from what students did last year:
Approximate Course Outline:
Part 1a: Combinational logic design
- Number representation
- The design process (digital systems, rapid prototyping, etc.)
- Combinational logic (Boolean algebra, truth tables, logic gates, etc.).
- Introduction to CAD tools, Verilog
- Optimization (K-maps, minimization, incompletely specified functions, multiple output circuits, multilevel networks)
- Arithmetic circuits.
- Combinational building blocks (multiplexers, demultiplexers, code converters, etc.)
Part 2: Sequential logic design
- Simple sequential circuits: flip-flops, registers and counters.
- Synchronous sequential circuits (state diagrams, state tables, Mealy vs. Moore circuits).
- Design of synchronous circuits using CAD tools.
- Analysis of clocked sequential networks.
- State tables (derivation, reduction, and state assignment).
- Finite state machine optimization.
Part 3: Finer details of leaky abstractions
- Implementation technology (transistor switches, NMOS, CMOS, standard chips, PLD’s, etc.)
- Noise margins, clock skew, propagation delays, hazards
Mask policy
Masks are required in the class so that people at risk feel safe and welcome to the class.
Academic Honesty Statement
Academic honesty is very important. It is dishonest to cheat on exams, to copy term papers, to submit papers written by another person, to fake experimental results, or to copy or reword parts of books or articles into your own papers without appropriately citing the source. Students committing or aiding in any of these violations may be given failing grades for an assignment or for an entire course, at the discretion of the instructor. In addition to any academic action taken by an instructor, these violations are also subject to action under the University of Maine Student Conduct Code. The maximum possible sanction under the student conduct code is dismissal from the University. Please see the University of Maine System’s Academic Integrity Policy listed in the Board Policy Manual as Policy 314 (*Date Issued: September 1, 2020): https://www.maine.edu/board-of-trustees/policy-manual/section-314/
Students Accessibility Services Statement
If you have a disability for which you may be requesting an accommodation, please contact Student Accessibility Services, 121 East Annex, 581.2319, as early as possible in the term. Students who have already been approved for accommodations by SAS and have a current accommodation letter should meet with me (Vikas Dhiman Barrows Hall Rm 105) privately as soon as possible.
Course Schedule Disclaimer
In the event of an extended disruption of normal classroom activities (due to COVID-19 or other long-term disruptions), the format for this course may be modified to enable its completion within its programmed time frame. In that event, you will be provided an addendum to the syllabus that will supersede this version.
COVID-19
To keep our campus safe, students are expected to comply with all University policies related to the COVID-19 pandemic. For the latest guidance, please visit https://umaine.edu/return
Observance of Religious Holidays/Events
The University of Maine recognizes that when students are observing significant religious holidays, some may be unable to attend classes or labs, study, take tests, or work on other assignments. If they provide adequate notice (at least one week and longer if at all possible), these students are allowed to make up course requirements as long as this effort does not create an unreasonable burden upon the instructor, department or University. At the discretion of the instructor, such coursework could be due before or after the examination or assignment. No adverse or prejudicial effects shall result to a student’s grade for the examination, study, or course requirement on the day of religious observance. The student shall not be marked absent from the class due to observing a significant religious holiday. In the case of an internship or clinical, students should refer to the applicable policy in place by the employer or site.
Sexual Discrimination Reporting
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The university can better support students in trouble if we know about what is happening. Reporting also helps us to identify patterns that might arise – for example, if more than one victim reports having been assaulted or harassed by the same individual.
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An employee from Title IX Student Services or the Office of Equal Opportunity will reach out to you and offer support, resources, and information. You will be invited to meet with the employee to discuss the situation and the various options available to you.
If you have requested confidentiality, the University will weigh your request that no action be taken against the institution’s obligation to provide a safe, nondiscriminatory environment for all students. If the University determines that it can maintain confidentiality, you must understand that the institution’s ability to meaningfully investigate the incident and pursue disciplinary action, if warranted, may be limited. There are times when the University may not be able to honor a request for confidentiality because doing so would pose a risk to its ability to provide a safe, nondiscriminatory environment for everyone. If the University determines that it cannot maintain confidentiality, the University will advise you, prior to starting an investigation and, to the extent possible, will share information only with those responsible for handling the institution’s response
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