Related Courses

UMaine Fall2020 and before

• Prof Richard Eason’s last year course.

MIT Courseware

6.004 Computation Structures

• https://archive.org/details/MIT6.004S17/
• https://ocw.mit.edu/6-004S17

Chris Terman. 6.004 Computation Structures. Spring 2017. Massachusetts Institute of Technology: MIT OpenCourseWare, https://ocw.mit.edu. License: Creative Commons BY-NC-SA.

6.111 Introductory Digital Systems Laboratory

https://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-111-introductory-digital-systems-laboratory-spring-2006/

Anantha Chandrakasan. 6.111 Introductory Digital Systems Laboratory. Spring 2006. Massachusetts Institute of Technology: MIT OpenCourseWare, https://ocw.mit.edu. License: Creative Commons BY-NC-SA.

https://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-111-introductory-digital-systems-laboratory-fall-2002/

Don Troxel, and James Kirtley Jr.. 6.111 Introductory Digital Systems Laboratory. Fall 2002. Massachusetts Institute of Technology: MIT OpenCourseWare, https://ocw.mit.edu. License: Creative Commons BY-NC-SA.

UMich

Book: http://www.cs.ucr.edu/~vahid/dd/

• https://www.eecs.umich.edu/courses/eecs270/overview.html
• https://www.eecs.umich.edu/courses/eecs270/refs.html

UML

• https://faculty.uml.edu//Tricia_Chigan/Courses/16_265/LogicDesign.html

UToledo

• https://www.utoledo.edu/engineering/electrical-engineering-computer-science/current-students/syllabi/eecs-1100-digital-logic-design.html
• Digital Design, 5/E,M. Morris Mano, Michael D. Ciletti, ISBN-10:0132774208

Coursera

• https://www.coursera.org/learn/digital-systems

U of Arizona

Books

• Vahid, Frank. Digital Design. ZyBooks. Online.
• Supplemental materials: Lysecky, Roman, and Frank Vahid. Verilog for Digital Design. ZyBooks. Online.
• https://ece.engineering.arizona.edu/undergrad-programs/courses/digital-logic

Udemy

• https://www.udemy.com/course/digital-electronics-logic-design/?ranMID=39197&ranEAID=vedj0cWlu2Y&ranSiteID=vedj0cWlu2Y-vcWAmf0a8OFhOvtHh7HiQQ&utm_source=aff-campaign&utm_medium=udemyads&LSNPUBID=vedj0cWlu2Y

How do it know

• http://www.buthowdoitknow.com/cpu_build.html
• https://www.youtube.com/watch?v=5z78IitpvfA&list=PLYE0XunAbwfBt2wXgDHEYPtILpimne_R9

Youtube playlists

• https://www.youtube.com/playlist?list=PLB52B8F4E464CEEF7
• https://www.youtube.com/watch?v=4729f01Fw2U&list=PLiwt1iVUib9vXV5xqD_QCTU5SVMjDN5U_
• https://www.youtube.com/watch?v=ThTmM7CeErc&list=PLS8ACsmFCpmTZH_9M7uE3VHZYz3Ks2bCG
• https://www.youtube.com/playlist?list=PLdNU3YZoxOwsx4YL3Grfixt1wNOZjOpyS

Github projects

Circuit Verse by IIIT Bangolore

• https://learn.circuitverse.org/docs/logic-design/

Verilog examples

• https://verilogguide.readthedocs.io/en/latest/verilog/firstproject.html